1. Field of the Invention
The present invention relates to a memory driving method for a semiconductor memory apparatus capable of achieving a series of data accesses by connecting two sense amplifying unit to a pair of bit lines.
2. Description of the Conventional Art
As well known to those who skilled in the art, FIG. 1 shows a conventional semiconductor apparatus, which includes a memory array having a plurality of word lines WL and a plurality of pairs of bit lines BL and /BL, here the word lines WL cross the pairs of the bit lines BL and /BL, and a plurality of memory cells MC disposed at each crossing point therebetween, a row decoder 2 for selecting a certain word line WL, a column decoder 3 for selecting a certain pair of bit lines of the pairs of the bit lines BL and /BL, a switching unit 4 connected to the pairs of the bit lines BL and /BL for controlling the output of the data outputted from the memory cell MC, and a sense amplifying unit 5 connected to the pairs of the bit lines BL and /BL through the switching unit 4 for amplifying the output of the memory cell MC to a certain level.
The sense amplifying unit 4 is directed to sensing the data contained in the bit lines BL and /BL and includes a plurality of bidirectional latch type sense amplifying units SA for recording the sensed data in the memory cells MC.
In addition, FIG. 2 shows a conventional semiconductor memory apparatus in more detail.
The memory driving method of a conventional semiconductor memory apparatus will now be explained with reference to FIGS. 1 through 3.
To begin with, as shown in FIG. 3B, in a state that a switch S1 is turned on by a switching control signal SW1, when a word line signal of a high level as shown in FIG. 3A is inputted to the row decoder 2, a data stored in a memory cell MC1 located at a crossing point between a word line WL1 and a bit line BL1 is outputted, and the bit lines BL1 and /BL1 are charged and discharged as shown in FIG. 3C.
In addition, an electric charge charged and discharged to the bit lines BL1 and /BL1 is inputted to a sense amplifying unit SA1 through a switch SW1 and input and output lines SL1 and /SL1 of the sense amplifying unit as shown in FIG. 3D, and the sense amplifying unit SA1 amplifies the electric charge to a certain level and restores the thusly amplified electric charge to the memory cell MC1 through the input and output lines SL1 and /SL1 of the sense amplifying unit, and is reset when the word line signal WL1 is turned to a low level.
Thereafter, one of other word lines is selected, and the sensing and restoring operations are performed with respect to the data stored in a corresponding memory cell in the same method as explained above, so that the operations thereof are accomplished.
However, since the conventional memory driving method is directed to repeatedly performing the operations for selecting a certain word line and performing sensing, restoring data stored in a corresponding memory cell, and resetting the sense amplifying unit, so that data access efficiency of memory is decreased.